Job Information
Apple CPU Power Management Microarchitect/RTL Engineer in Waltham, Massachusetts
CPU Power Management Microarchitect/RTL Engineer
Waltham,Massachusetts,United States
Hardware
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive architecture and RTL for world-class CPU power management solutions.
Description
As a CPU Power Management Microarchitect/RTL Engineer, you will own or contribute to the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification. • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals. • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification • Performance exploration and correlation - explore high performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance. • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power.
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Knowledge of microprocessor architecture
Knowledge of Verilog and/or VHDL
Experience with simulators and waveform debugging tools
Knowledge of logic design principles along with timing and power implications
Key Qualifications
Preferred Qualifications
Expertise in one or more of the following areas:
Coherence protocols and interconnects
High performance (low latency, high bandwidth) design techniques
Memory subsystem queuing, scheduling; starvation and deadlock avoidance
SRAM design basics
Multiple clock/power domains and power management strategies
Prefetchers, replacement policies
Debug capabilities
DFT strategies
Error detection and correction
Understanding of low power microarchitecture techniques
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Experience in C or C++ programming
Experience using an interpretive language such as Perl or Python
Education & Experience
Additional Requirements
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