MIT Lincoln Laboratory Digital Systems Architect in Lexington, Massachusetts
The Advanced Lasercom Systems and Operations Group develops, builds, tests, and operates laser communications systems for a variety of applications and environments. Lasercom offers dramatically increased data rates and enhanced physical security relative to microwave-based communications systems. The Group has expertise in communications; optics; electro-optics; optomechanics; optical turbulence mitigation; precise pointing control systems; embedded systems; command, control, and telemetry; test set design and fabrication; data analysis; modeling; and simulation.
The Advanced Lasercom Systems and Operations Group seeks a full time Technical Staff member to oversee the digital design, layout, simulation, implementation, testing, and verification of hardware for high-speed optical communications systems and precision tracking systems. Most designs will be FGPA and PCB based, for flexibility, although ASIC designs may be preferred for certain projects. The candidate should be highly motivated and proactive, working closely with a small dynamic team, solving challenging problems with direct impact on National security.
The job function will involve:
Collaborating with system engineers, optical engineers, and software developers, to jointly develop and implement high-speed digital signal processing and control systems supporting optical communications systems.
Developing and driving project schedule in collaboration with management.
Regularly interfacing with stakeholders to understand and influence requirements, and to anticipate the evolution of requirements over time. Presenting progress to stakeholders periodically.
Regularly interfacing with FPGA vendors to push the performance envelope.
Overseeing board bring-up activities, system level integration, verification, troubleshooting, and field testing.
Minimum Bachelor of Science in Computer Engineering, Electrical Engineering, or similar discipline.
Minimum 15 years in FPGA/ Digital Logic Design role, with at least five years of experience in at least two of the following: (1) implementing and testing custom RTL using VHDL, (2) PCB design, layout, bring-up, (3) embedded C/C++ and common scripting languages, and (4) signal integrity.
Preference given to candidates with experience with the Mentor Graphics suite of tools.
Experience with Xilinx Virtex FPGAs, preferably including UltraScale+.
Prefer candidates with experience with high speed data links, high speed SERDES, and implementing modern memory architectures such as DDR4.
Not required, but advantageous to have familiarity with communications networking protocols, such as Ethernet, Generic Framing Procedure (GFP), Optical Transport Network (OTN).
For Benefits Information, click http://hrweb.mit.edu/benefits
Selected candidate will be subject to a pre-employment background investigation and must be able to obtain and maintain a Secret level DoD security clearance.
MIT Lincoln Laboratory is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information; U.S. citizenship is required.
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